Mar 25 2015

Talk at HEPIX Spring Workshop

CSN5

The COSA project will offer free access to the low power cluster through a batch system for application testing and benchmarking purposes to the scientific communities within the INFN its and collaborators.

We are looking for collaborators from the scientific and industrial world. If you are interested please contact us

COSA is currently evaluating various low power architectures in order to select the platform to build the clusters at CNAF and in ROME.

SoCs under evaluation are:

the Exynos 5410 by Samsung - ODROID-XU Board
the Exynos 5422 by Samsung – ODROID-XU3 Board
the Exynos 5420 by Samsung – ARNDALE Octa Board
the A80 by Allwinner - CUBIEboard
the NVIDIA K1 – Jetson K1 board
the NVIDIA X1 - Jetson X1 board
the Snapdragon 800 by Qualcom on the DragonBoard
the Freescale iMX.6 on the SabreBoard
the Texas Instruments KEYSTONE-II on the EVMK2H evaluation module
the Intel Atom processor (avoton) C2750
the Intel Xeon D-1540
the Intel Pentium N3700
the Intel Pentium J4205

A Prototype of the CNAF low power cluster is already in place to test these development boards.

National Institute for nuclear physics - Commissione Scientifica Nazionale 5

Funding is provided to the project by INFN through its Fifth Scientific National Commission (CSN5). The project was approved as a two year project starting in January 2015.

The following INFN departments partecipate to the COSA project:

Services

Funding

The project

MAY 19 2016

Workshop di CCR,

La Biodola.

See Agenda

MAR 2017

PDP 2017 - Saint Petersburg

Two contributions

Computing on SOC architecture at INFN

COSA is a three-year project (2015-2017) funded by the Scientific Commission V of the Italian Institute for Nuclear Physics (INFN). The main objective of the project is to investigate the performances, the total cost of ownership and the possibilities offered by computing systems based on commodity low power Systems on Chip (SoC). Computing performances will be measured running real life applications taken from the High Energy Physics (HEP) community belonging to the Institute.

The project is building and maintaining three clusters. One is located in Bologna (CNAF department) and will be composed of development boards powered by the state of the art low power SoCs running Linux. Another one, located in Rome (ROME1 department) exploits the last generation FPGAs to prototype low latency network connections between low power CPUs. The third cluster, located in the Padova department, is based on traditional, non-low-power, CPUs, accelerators and network connections. This cluster is used as a reference for the performance of the scientific applications run on the other two clusters.